Eeyeon Goo is an integrated MS-PhD student in the Department of Electrical and Electronic Engineering at Yonsei University, having joined the program in March 2026. She conducts research in CPU microarchitecture, with a primary focus on understanding and alleviating memory access latency in modern processors. Her work also encompasses microarchitectural mechanisms such as register renaming and other core-level architectural design considerations. Through systematic analysis and architectural exploration, she seeks to contribute to the development of more efficient and scalable computing systems.