Publications
2024
Intel Accelerators Ecosystem: An SoC-Oriented Perspective : Industry Product
ACM/IEEE International Symposium on Computer Architecture (ISCA)
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29 Jun 2024
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doi:10.1109/ISCA59077.2024.00066
HAL: Hardware-assisted Load Balancing for Energy-efficient SNIC-Host Cooperative Computing
ACM/IEEE International Symposium on Computer Architecture (ISCA)
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29 Jun 2024
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doi:10.1109/ISCA59077.2024.00051
Triple-A: Early Operand Collector Allocation for Maximizing GPU Register Bank Utilization
IEEE Embedded Systems Letters
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01 Jun 2024
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doi:10.1109/LES.2023.3307622
TAROT: A CXL SmartNIC-Based Defense Against Multi-bit Errors by Row-Hammer Attacks
ACM Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS)
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27 Apr 2024
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doi:10.1145/3620666.3651325
A Quantitative Analysis and Guidelines of Data Streaming Accelerator in Modern Intel Xeon Scalable Processors
ACM Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS)
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27 Apr 2024
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doi:10.1145/3620665.3640401
ScaleCache: A Scalable Page Cache for Multiple Solid-State Drives
ACM SIGOPS European Conference on Computer Systems (EuroSys)
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22 Apr 2024
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doi:10.1145/3627703.3629588
A Quantitative Analysis and Guidelines of Data Streaming Accelerator in Modern Intel Xeon Scalable Processors
arXiv
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31 Jan 2024
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arXiv:2305.02480
A Multi-DNN Acceleration Architecture for Balanced QoS and Throughput
International Conference on Electronics, Information, and Communication (ICEIC)
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28 Jan 2024
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[no id info]
2023
A Convertible Neural Processor Supporting Adaptive Quantization for Real-Time Neural Networks
Journal of Systems Architecture
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01 Dec 2023
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doi:10.1016/j.sysarc.2023.103025
Demystifying CXL Memory with Genuine CXL-Ready Systems and Devices
IEEE/ACM International Symposium on Microarchitecture (MICRO)
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28 Oct 2023
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doi:10.1145/3613424.3614256
INTERPRET: Inter-Warp Register Reuse for GPU Tensor Core
ACM International Conference on Parallel Architectures And Compilation Techniques (PACT)
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21 Oct 2023
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doi:10.1109/pact58117.2023.00033
Demystifying CXL Memory with Genuine CXL-Ready Systems and Devices
arXiv
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06 Oct 2023
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arXiv:2303.15375
LADIO: Leakage-Aware Direct I/O for I/O-Intensive Workloads
IEEE Computer Architecture Letters
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01 Jul 2023
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doi:10.1109/LCA.2023.3290427
2022
CASH-RF: A Compiler-Assisted Hierarchical Register File in GPUs
IEEE Embedded Systems Letters
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01 Dec 2022
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doi:10.1109/LES.2022.3163749
Reconstructing Out-of-Order Issue Queue
IEEE/ACM International Symposium on Microarchitecture (MICRO)
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01 Oct 2022
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doi:10.1109/micro56248.2022.00023
TEA-RC: Thread Context-Aware Register Cache for GPUs
IEEE Access
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01 Jan 2022
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doi:10.1109/ACCESS.2022.3196149
2020
CASINO Core Microarchitecture: Generating Out-of-Order Schedules Using Cascaded In-Order Scheduling Windows
IEEE International Symposium on High Performance Computer Architecture (HPCA)
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01 Feb 2020
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doi:10.1109/hpca47549.2020.00039
2019
OverCome: Coarse-Grained Instruction Commit with Handover Register Renaming
IEEE Transactions on Computers
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01 Dec 2019
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doi:10.1109/TC.2019.2936557
2018
Constructing Resilient Region in Dynamic Optimization Systems via Dynamic Adjustment of Bias Thresholds
IEEE International Conference On Consumer Electronics Asia (ICCE-ASIA)
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01 Jun 2018
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[no id info]
2017
Parallel In-Order Execution Architecture for Low-Power Processor
International SoC Design Conference (ISOCC)
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01 Nov 2017
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doi:10.1109/isocc.2017.8368829
Dynamic Warp Scheduler Selection Policy Using Linear Regression for GPUs
International Conference on Electronics, Information, and Communication (ICEIC)
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01 Jan 2017
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[no id info]
2016
Analyzing Development Trends and Performance/Power Characteristics of Multi-Core Processors
Annual Summer Conference of IEIE
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01 Jun 2016
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[no id info]
Heterogeneous Core Microarchitecture with Functional Unit Gating for High Energy Efficiency
Annual Summer Conference of IEIE
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01 Jun 2016
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[no id info]
2014
Exploiting Back-End Fusion in Multi-Core Processors
Annual Fall Conference of KIPS
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01 Nov 2014
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[no id info]